Could the surfaces of semiconducting nanowires be the key to performance?

When it comes to the performance of semiconducting nanowires, much progress is still to be made, mainly because the nanowires’ surfaces have not been optimized. LMGP, IMEP-LaHC, and two Paris-based labs* are addressing the fundamental surface changes that affect semiconducting nanowires. Their work is part of the ANR (French national research agency) Scenic project, which runs through 2024. The scientists will characterize, functionalize, and optimize the surfaces and, ultimately, prototype a piezoelectric device with output voltage well above current values.

Specifically, they will work on nanowires made from two materials with the same crystallographic structure, zinc oxide and gallium nitride, and that are easy to compare. A nanowire 50 nm in diameter and 1 µm long has a surface area of more than 150,000 nm²!

*C2N (CNRS, Saclay) and Geeps (Supélec, Gif-sur-Yvette)

Contacts: vincent.consonni@grenoble-inp.fr; gustavo-adolfo.ardila-rodriguez@grenoble-inp.fr

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