Ferroelectric field effect transistor (FeMFET) for multi-bit per cell memories and in-memory computing applications

The recent discovery of ferroelectricity in hafnium oxide (HfO2) thin films generates a strong interest for ultra-low power non volatile memories, in which the information is stored by the orientation of the electric dipoles in this material.

Among those memories, the ferroelectric field effect transistor (FeFET) is quite appealing to combine logic and memory operations in the same device. However today this device shows some limitations in terms of endurance and data retention. To circumvent those issues, a new FeFET has recently been proposed, consisting of a ferroelectric capacitor connected to the gate of a conventional FET (so-called 1T-1C FeFET or FeMFET for Ferroelectric Metal Field Effect Transistor).

The aim of this Ph.D. thesis will be to simulate, fabricate and characterize this FeMFET device, which will be used to increase the density of information in future ultra-low power electronic systems, thanks to the Multi-Level Cell (MLC) and In-Memory Computing capability of this new memory.

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